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Searched refs:DCN_BASE__INST0_SEG5 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_dcn315.c38 #define DCN_BASE__INST0_SEG5 0 macro
Ddmub_dcn316.c38 #define DCN_BASE__INST0_SEG5 0 macro
Ddmub_dcn314.c38 #define DCN_BASE__INST0_SEG5 0 macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
Dhw_factory_dcn315.c50 #define DCN_BASE__INST0_SEG5 0 macro
Dhw_translate_dcn315.c43 #define DCN_BASE__INST0_SEG5 0 macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/irq/dcn315/
Dirq_service_dcn315.c43 #define DCN_BASE__INST0_SEG5 0 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h272 #define DCN_BASE__INST0_SEG5 0 macro
Ddimgrey_cavefish_ip_offset.h366 #define DCN_BASE__INST0_SEG5 0 macro
Dbeige_goby_ip_offset.h444 #define DCN_BASE__INST0_SEG5 0 macro
Dvangogh_ip_offset.h455 #define DCN_BASE__INST0_SEG5 0 macro
Dyellow_carp_offset.h390 #define DCN_BASE__INST0_SEG5 0 macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn316/
Ddcn316_resource.c99 #define DCN_BASE__INST0_SEG5 0 macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn315/
Ddcn315_resource.c101 #define DCN_BASE__INST0_SEG5 0 macro