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Searched refs:DCFCLK_CNTL (Results 1 – 16 of 16) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dce/
Ddce_hwseq.h200 SR(DCFCLK_CNTL),\
201 SR(DCFCLK_CNTL), \
425 SR(DCFCLK_CNTL),\
426 SR(DCFCLK_CNTL), \
637 uint32_t DCFCLK_CNTL; member
778 HWS_SF(, DCFCLK_CNTL, DCFCLK_GATE_DIS, mask_sh), \
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn35/
Ddcn35_resource.h171 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
Ddcn201_hwseq.c370 REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); in dcn201_init_hw()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
Ddcn31_hwseq.c253 REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); in dcn31_init_hw()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
Ddcn30_hwseq.c787 REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); in dcn30_init_hw()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn316/
Ddcn316_resource.c681 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
Ddcn35_hwseq.c281 REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); in dcn35_init_hw()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn314/
Ddcn314_resource.c694 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn321/
Ddcn321_resource.c534 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn315/
Ddcn315_resource.c686 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn31/
Ddcn31_resource.c687 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
Ddcn32_hwseq.c957 REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); in dcn32_init_hw()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
Ddcn401_hwseq.c411 REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); in dcn401_init_hw()
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn401/
Ddcn401_resource.c517 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/
Ddcn32_resource.c537 SR(DCFCLK_CNTL),\
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
Ddcn10_hwseq.c1675 REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0); in dcn10_init_hw()