| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | display_mode_vba_util_32.h | 693 const double DCFCLK,
699 const double DCFCLK,
706 double DCFCLK,
807 double DCFCLK,
1003 double DCFCLK,
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| D | display_mode_vba_util_32.c | 3282 const double DCFCLK, in dml32_get_return_bw_mbps() argument
3287 …e IdealSDPPortBandwidth = soc->return_bus_width_bytes /*mode_lib->vba.ReturnBusWidth*/ * DCFCLK; in dml32_get_return_bw_mbps()
3307 dml_print("DML::%s: DCFCLK = %f\n", __func__, DCFCLK); in dml32_get_return_bw_mbps()
3324 const double DCFCLK, in dml32_get_return_bw_mbps_vm_only() argument
3329 soc->return_bus_width_bytes * DCFCLK * soc->pct_ideal_sdp_bw_after_urgent / 100.0, in dml32_get_return_bw_mbps_vm_only()
3338 dml_print("DML::%s: DCFCLK = %f\n", __func__, DCFCLK); in dml32_get_return_bw_mbps_vm_only()
3349 double DCFCLK, in dml32_CalculateExtraLatency() argument
3382 …ExtraLatency = (RoundTripPingLatencyCycles + __DML_ARB_TO_RET_DELAY__) / DCFCLK + ExtraLatencyByte… in dml32_CalculateExtraLatency()
3386 dml_print("DML::%s: DCFCLK=%f\n", __func__, DCFCLK); in dml32_CalculateExtraLatency()
4261 double DCFCLK, in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() argument
[all …]
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| D | display_mode_vba_32.c | 539 mode_lib->vba.DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
545 dml_print("DML::%s: mode_lib->vba.DCFCLK = %f\n", __func__, mode_lib->vba.DCFCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
582 mode_lib->vba.DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1194 v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1522 mode_lib->vba.DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1586 mode_lib->vba.DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3732 mode_lib->vba.DCFCLK = mode_lib->vba.DCFCLKState[mode_lib->vba.VoltageLevel][MaximumMPCCombine]; in dml32_ModeSupportAndSystemConfigurationFull()
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| D | dcn32_fpu.c | 1656 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn32_calculate_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/ |
| D | display_mode_core.h | 52 dml_float_t DCFCLK,
60 dml_float_t DCFCLK,
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| D | display_mode_core_structs.h | 777 …dml_float_t DCFCLK; /// <brief Basically just the clock freq at the min (or given) state and max c… member
1279 dml_float_t DCFCLK; member
1475 dml_float_t DCFCLK; member
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| D | display_mode_core.c | 620 dml_float_t DCFCLK,
3967 dml_print("DML::%s: DCFCLK = %f\n", __func__, p->DCFCLK); in CalculateStutterEfficiency()
3970 …th - PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer) / (p->DCFCLK * 64) + *p->Stutte… in CalculateStutterEfficiency()
3974 …aReadBandwidth - PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer) / (p->DCFCLK * 64)); in CalculateStutterEfficiency()
4463 dml_float_t DCFCLK, in CalculateExtraLatency() argument
4496 …ExtraLatency = (RoundTripPingLatencyCycles + __DML_ARB_TO_RET_DELAY__) / DCFCLK + ExtraLatencyByte… in CalculateExtraLatency()
4500 dml_print("DML::%s: DCFCLK=%f\n", __func__, DCFCLK); in CalculateExtraLatency()
5769 dml_float_t DCFCLK, in dml_get_return_bw_mbps_vm_only() argument
5774 dml_min3(soc->return_bus_width_bytes * DCFCLK * soc->pct_ideal_sdp_bw_after_urgent / 100.0, in dml_get_return_bw_mbps_vm_only()
5781 dml_print("DML::%s: DCFCLK = %f\n", __func__, DCFCLK); in dml_get_return_bw_mbps_vm_only()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| D | dml2_core_shared_types.h | 348 …double DCFCLK; /// <brief Basically just the clock freq at the min (or given) state and max combin… member
542 …double DCFCLK; /// <brief Basically just the clock freq at the min (or given) state and max combin… member
1518 double DCFCLK; member
1658 double DCFCLK; member
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| D | dml2_core_dcn4.c | 431 …ort_result.global.active.dcfclk_khz = (unsigned long)(core->clean_me_up.mode_lib.ms.DCFCLK * 1000); in core_dcn4_mode_support()
435 …result.global.svp_prefetch.dcfclk_khz = (unsigned long)core->clean_me_up.mode_lib.ms.DCFCLK * 1000; in core_dcn4_mode_support()
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| D | dml2_core_shared.c | 542 double DCFCLK,
773 …mode_lib->ms.DCFCLK = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].… in dml2_core_shared_mode_support()
793 dml2_printf("DML::%s: DCFCLK = %f\n", __func__, mode_lib->ms.DCFCLK); in dml2_core_shared_mode_support()
1987 dml2_printf("DML::%s: mode_lib->ms.DCFCLK = %f\n", __func__, mode_lib->ms.DCFCLK); in dml2_core_shared_mode_support()
1991 …ze_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.re… in dml2_core_shared_mode_support()
2014 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)); in dml2_core_shared_mode_support()
2034 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)); in dml2_core_shared_mode_support()
2142 mode_lib->ms.DCFCLK, in dml2_core_shared_mode_support()
2255 mode_lib->ms.DCFCLK, in dml2_core_shared_mode_support()
2673 CalculateWatermarks_params->DCFCLK = mode_lib->ms.DCFCLK; in dml2_core_shared_mode_support()
[all …]
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| D | dml2_core_dcn4_calcs.c | 4949 double DCFCLK, in CalculateExtraLatency() argument
5007 *ExtraLatency_sr = dchub_arb_to_ret_delay / DCFCLK; in CalculateExtraLatency()
5012 …*ExtraLatency_sr = dchub_arb_to_ret_delay / DCFCLK + RoundTripPingLatencyCycles / FabricClock + Re… in CalculateExtraLatency()
5026 dml2_printf("DML::%s: DCFCLK=%f\n", __func__, DCFCLK); in CalculateExtraLatency()
7047 …mode_lib->ms.DCFCLK = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].… in dml_core_mode_support()
7068 dml2_printf("DML::%s: DCFCLK = %f\n", __func__, mode_lib->ms.DCFCLK); in dml_core_mode_support()
8343 dml2_printf("DML::%s: mode_lib->ms.DCFCLK = %f\n", __func__, mode_lib->ms.DCFCLK); in dml_core_mode_support()
8346 …ze_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.re… in dml_core_mode_support()
8368 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)); in dml_core_mode_support()
8388 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)); in dml_core_mode_support()
[all …]
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| /linux-6.12.1/Documentation/gpu/amdgpu/display/ |
| D | dc-glossary.rst | 39 * DCFCLK: Display Controller Fabric Clock
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_mode_vba_31.c | 295 double DCFCLK,
483 double DCFCLK,
606 double DCFCLK,
2149 DTRACE(" dcfclk_mhz = %f", v->DCFCLK);
2461 dml_min(v->ReturnBusWidth * v->DCFCLK, v->FabricClock * v->FabricDatapathToDCNDataReturn)
2468 dml_print("DML::%s: v->DCFCLK = %f\n", __func__, v->DCFCLK);
2486 v->DCFCLK,
2940 v->DCFCLK,
3217 v->DCFCLK,
5536 v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine];
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_mode_vba_314.c | 304 double DCFCLK,
492 double DCFCLK,
614 double DCFCLK,
2167 DTRACE(" dcfclk_mhz = %f", v->DCFCLK);
2480 dml_min(v->ReturnBusWidth * v->DCFCLK, v->FabricClock * v->FabricDatapathToDCNDataReturn)
2487 dml_print("DML::%s: v->DCFCLK = %f\n", __func__, v->DCFCLK);
2505 v->DCFCLK,
2959 v->DCFCLK,
3236 v->DCFCLK,
5630 v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine];
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 303 double DCFCLK,
513 double DCFCLK,
620 double DCFCLK,
1871 v->ReturnBusWidth * v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2028 DTRACE(" dcfclk_mhz = %f", v->DCFCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2341 v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2750 v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3015 v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5181 v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine]; in dml30_ModeSupportAndSystemConfigurationFull()
5199 double DCFCLK, in CalculateWatermarksAndDRAMSpeedChangeSupport() argument
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_mode_vba_20.c | 255 > mode_lib->vba.DCFCLK * mode_lib->vba.ReturnBusWidth / 4.0) in adjust_ReturnBW()
266 - mode_lib->vba.DCFCLK in adjust_ReturnBW()
271 CriticalCompression = 2.0 * mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLK in adjust_ReturnBW()
287 * mode_lib->vba.DCFCLK in adjust_ReturnBW()
1306 mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLK, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1319 mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLK, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1327 DTRACE(" dcfclk_mhz = %f", mode_lib->vba.DCFCLK); in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1414 (mode_lib->vba.RoundTripPingLatencyCycles + 32) / mode_lib->vba.DCFCLK in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1631 / (mode_lib->vba.DCFCLK * 64); in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5100 mode_lib->vba.DCFCLK = mode_lib->vba.DCFCLKPerState[mode_lib->vba.VoltageLevel]; in dml20_ModeSupportAndSystemConfigurationFull()
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| D | display_mode_vba_20v2.c | 279 > mode_lib->vba.DCFCLK * mode_lib->vba.ReturnBusWidth / 4.0) in adjust_ReturnBW()
290 - mode_lib->vba.DCFCLK in adjust_ReturnBW()
295 CriticalCompression = 2.0 * mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLK in adjust_ReturnBW()
311 * mode_lib->vba.DCFCLK in adjust_ReturnBW()
1366 mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLK, in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1379 mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLK, in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1387 DTRACE(" dcfclk_mhz = %f", mode_lib->vba.DCFCLK); in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1474 (mode_lib->vba.RoundTripPingLatencyCycles + 32) / mode_lib->vba.DCFCLK in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1667 / (mode_lib->vba.DCFCLK * 64); in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5216 mode_lib->vba.DCFCLK = mode_lib->vba.DCFCLKPerState[mode_lib->vba.VoltageLevel]; in dml20v2_ModeSupportAndSystemConfigurationFull()
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| D | dcn20_fpu.c | 1155 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn20_calculate_dlg_params()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_vba.c | 380 mode_lib->vba.DCFCLK = soc->clock_limits[i].dcfclk_mhz; in fetch_socbb_params()
1093 mode_lib->vba.DCFCLK = mode_lib->vba.cache_pipes[0].clks_cfg.dcfclk_mhz; in ModeSupportAndSystemConfiguration()
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| D | display_mode_vba.h | 438 double DCFCLK; member
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_mode_vba_21.c | 295 double DCFCLK,
1680 DTRACE(" dcfclk_mhz = %f", mode_lib->vba.DCFCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2016 (mode_lib->vba.RoundTripPingLatencyCycles + 32) / mode_lib->vba.DCFCLK in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2427 mode_lib->vba.DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2767 / (mode_lib->vba.DCFCLK * 64) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5223 mode_lib->vba.DCFCLK = mode_lib->vba.DCFCLKPerState[mode_lib->vba.VoltageLevel]; in dml21_ModeSupportAndSystemConfigurationFull()
5252 double DCFCLK, in CalculateWatermarksAndDRAMSpeedChangeSupport() argument
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