Home
last modified time | relevance | path

Searched refs:DCCG_AUDIO_DTO1_PHASE (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_audio.h40 SR(DCCG_AUDIO_DTO1_PHASE)
57 SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\
74 SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\
94 uint32_t DCCG_AUDIO_DTO1_PHASE; member
112 uint8_t DCCG_AUDIO_DTO1_PHASE; member
132 uint32_t DCCG_AUDIO_DTO1_PHASE; member
Ddce_audio.c1143 REG_UPDATE(DCCG_AUDIO_DTO1_PHASE, in dce_aud_wall_dto_setup()
1144 DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase); in dce_aud_wall_dto_setup()
1235 REG_UPDATE(DCCG_AUDIO_DTO1_PHASE, in dce60_aud_wall_dto_setup()
1236 DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase); in dce60_aud_wall_dto_setup()
/linux-6.12.1/drivers/gpu/drm/radeon/
Ddce3_1_afmt.c165 WREG32(DCCG_AUDIO_DTO1_PHASE, dto_phase); in dce3_2_audio_set_dto()
Ddce6_afmt.c317 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); in dce6_dp_audio_set_dto()
Dr600_hdmi.c335 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000 * 100); in r600_hdmi_audio_set_dto()
Devergreen_hdmi.c304 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); in dce4_dp_audio_set_dto()
Dsid.h915 #define DCCG_AUDIO_DTO1_PHASE 0x05c0 macro
Devergreend.h508 #define DCCG_AUDIO_DTO1_PHASE 0x05c0 macro
Dr600d.h962 #define DCCG_AUDIO_DTO1_PHASE 0x0524 macro
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h918 #define DCCG_AUDIO_DTO1_PHASE 0x05c0 macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/
Ddcn32_resource.h233 SR_ARR(DCCG_AUDIO_DTO1_PHASE, id) \