1  /* SPDX-License-Identifier: GPL-2.0-or-later */
2  /*
3   * Register declarations for DA9052 PMICs.
4   *
5   * Copyright(c) 2011 Dialog Semiconductor Ltd.
6   *
7   * Author: David Dajun Chen <dchen@diasemi.com>
8   */
9  
10  #ifndef __LINUX_MFD_DA9052_REG_H
11  #define __LINUX_MFD_DA9052_REG_H
12  
13  /* PAGE REGISTERS */
14  #define DA9052_PAGE0_CON_REG		0
15  #define DA9052_PAGE1_CON_REG		128
16  
17  /* STATUS REGISTERS */
18  #define DA9052_STATUS_A_REG		1
19  #define DA9052_STATUS_B_REG		2
20  #define DA9052_STATUS_C_REG		3
21  #define DA9052_STATUS_D_REG		4
22  
23  /* PARK REGISTER */
24  #define DA9052_PARK_REGISTER		DA9052_STATUS_D_REG
25  
26  /* EVENT REGISTERS */
27  #define DA9052_EVENT_A_REG		5
28  #define DA9052_EVENT_B_REG		6
29  #define DA9052_EVENT_C_REG		7
30  #define DA9052_EVENT_D_REG		8
31  #define DA9052_FAULTLOG_REG		9
32  
33  /* IRQ REGISTERS */
34  #define DA9052_IRQ_MASK_A_REG		10
35  #define DA9052_IRQ_MASK_B_REG		11
36  #define DA9052_IRQ_MASK_C_REG		12
37  #define DA9052_IRQ_MASK_D_REG		13
38  
39  /* CONTROL REGISTERS */
40  #define DA9052_CONTROL_A_REG		14
41  #define DA9052_CONTROL_B_REG		15
42  #define DA9052_CONTROL_C_REG		16
43  #define DA9052_CONTROL_D_REG		17
44  
45  #define DA9052_PDDIS_REG		18
46  #define DA9052_INTERFACE_REG		19
47  #define DA9052_RESET_REG		20
48  
49  /* GPIO REGISTERS */
50  #define DA9052_GPIO_0_1_REG		21
51  #define DA9052_GPIO_2_3_REG		22
52  #define DA9052_GPIO_4_5_REG		23
53  #define DA9052_GPIO_6_7_REG		24
54  #define DA9052_GPIO_8_9_REG		25
55  #define DA9052_GPIO_10_11_REG		26
56  #define DA9052_GPIO_12_13_REG		27
57  #define DA9052_GPIO_14_15_REG		28
58  
59  /* POWER SEQUENCER CONTROL REGISTERS */
60  #define DA9052_ID_0_1_REG		29
61  #define DA9052_ID_2_3_REG		30
62  #define DA9052_ID_4_5_REG		31
63  #define DA9052_ID_6_7_REG		32
64  #define DA9052_ID_8_9_REG		33
65  #define DA9052_ID_10_11_REG		34
66  #define DA9052_ID_12_13_REG		35
67  #define DA9052_ID_14_15_REG		36
68  #define DA9052_ID_16_17_REG		37
69  #define DA9052_ID_18_19_REG		38
70  #define DA9052_ID_20_21_REG		39
71  #define DA9052_SEQ_STATUS_REG		40
72  #define DA9052_SEQ_A_REG		41
73  #define DA9052_SEQ_B_REG		42
74  #define DA9052_SEQ_TIMER_REG		43
75  
76  /* LDO AND BUCK REGISTERS */
77  #define DA9052_BUCKA_REG		44
78  #define DA9052_BUCKB_REG		45
79  #define DA9052_BUCKCORE_REG		46
80  #define DA9052_BUCKPRO_REG		47
81  #define DA9052_BUCKMEM_REG		48
82  #define DA9052_BUCKPERI_REG		49
83  #define DA9052_LDO1_REG		50
84  #define DA9052_LDO2_REG		51
85  #define DA9052_LDO3_REG		52
86  #define DA9052_LDO4_REG		53
87  #define DA9052_LDO5_REG		54
88  #define DA9052_LDO6_REG		55
89  #define DA9052_LDO7_REG		56
90  #define DA9052_LDO8_REG		57
91  #define DA9052_LDO9_REG		58
92  #define DA9052_LDO10_REG		59
93  #define DA9052_SUPPLY_REG		60
94  #define DA9052_PULLDOWN_REG		61
95  #define DA9052_CHGBUCK_REG		62
96  #define DA9052_WAITCONT_REG		63
97  #define DA9052_ISET_REG		64
98  #define DA9052_BATCHG_REG		65
99  
100  /* BATTERY CONTROL REGISTRS */
101  #define DA9052_CHG_CONT_REG		66
102  #define DA9052_INPUT_CONT_REG		67
103  #define DA9052_CHG_TIME_REG		68
104  #define DA9052_BBAT_CONT_REG		69
105  
106  /* LED CONTROL REGISTERS */
107  #define DA9052_BOOST_REG		70
108  #define DA9052_LED_CONT_REG		71
109  #define DA9052_LEDMIN123_REG		72
110  #define DA9052_LED1_CONF_REG		73
111  #define DA9052_LED2_CONF_REG		74
112  #define DA9052_LED3_CONF_REG		75
113  #define DA9052_LED1CONT_REG		76
114  #define DA9052_LED2CONT_REG		77
115  #define DA9052_LED3CONT_REG		78
116  #define DA9052_LED_CONT_4_REG		79
117  #define DA9052_LED_CONT_5_REG		80
118  
119  /* ADC CONTROL REGISTERS */
120  #define DA9052_ADC_MAN_REG		81
121  #define DA9052_ADC_CONT_REG		82
122  #define DA9052_ADC_RES_L_REG		83
123  #define DA9052_ADC_RES_H_REG		84
124  #define DA9052_VDD_RES_REG		85
125  #define DA9052_VDD_MON_REG		86
126  
127  #define DA9052_ICHG_AV_REG		87
128  #define DA9052_ICHG_THD_REG		88
129  #define DA9052_ICHG_END_REG		89
130  #define DA9052_TBAT_RES_REG		90
131  #define DA9052_TBAT_HIGHP_REG		91
132  #define DA9052_TBAT_HIGHN_REG		92
133  #define DA9052_TBAT_LOW_REG		93
134  #define DA9052_T_OFFSET_REG		94
135  
136  #define DA9052_ADCIN4_RES_REG		95
137  #define DA9052_AUTO4_HIGH_REG		96
138  #define DA9052_AUTO4_LOW_REG		97
139  #define DA9052_ADCIN5_RES_REG		98
140  #define DA9052_AUTO5_HIGH_REG		99
141  #define DA9052_AUTO5_LOW_REG		100
142  #define DA9052_ADCIN6_RES_REG		101
143  #define DA9052_AUTO6_HIGH_REG		102
144  #define DA9052_AUTO6_LOW_REG		103
145  
146  #define DA9052_TJUNC_RES_REG		104
147  
148  /* TSI CONTROL REGISTERS */
149  #define DA9052_TSI_CONT_A_REG		105
150  #define DA9052_TSI_CONT_B_REG		106
151  #define DA9052_TSI_X_MSB_REG		107
152  #define DA9052_TSI_Y_MSB_REG		108
153  #define DA9052_TSI_LSB_REG		109
154  #define DA9052_TSI_Z_MSB_REG		110
155  
156  /* RTC COUNT REGISTERS */
157  #define DA9052_COUNT_S_REG		111
158  #define DA9052_COUNT_MI_REG		112
159  #define DA9052_COUNT_H_REG		113
160  #define DA9052_COUNT_D_REG		114
161  #define DA9052_COUNT_MO_REG		115
162  #define DA9052_COUNT_Y_REG		116
163  
164  /* RTC CONTROL REGISTERS */
165  #define DA9052_ALARM_MI_REG		117
166  #define DA9052_ALARM_H_REG		118
167  #define DA9052_ALARM_D_REG		119
168  #define DA9052_ALARM_MO_REG		120
169  #define DA9052_ALARM_Y_REG		121
170  #define DA9052_SECOND_A_REG		122
171  #define DA9052_SECOND_B_REG		123
172  #define DA9052_SECOND_C_REG		124
173  #define DA9052_SECOND_D_REG		125
174  
175  /* PAGE CONFIGURATION BIT */
176  #define DA9052_PAGE_CONF		0X80
177  
178  /* STATUS REGISTER A BITS */
179  #define DA9052_STATUSA_VDATDET		0X80
180  #define DA9052_STATUSA_VBUSSEL		0X40
181  #define DA9052_STATUSA_DCINSEL		0X20
182  #define DA9052_STATUSA_VBUSDET		0X10
183  #define DA9052_STATUSA_DCINDET		0X08
184  #define DA9052_STATUSA_IDGND		0X04
185  #define DA9052_STATUSA_IDFLOAT		0X02
186  #define DA9052_STATUSA_NONKEY		0X01
187  
188  /* STATUS REGISTER B BITS */
189  #define DA9052_STATUSB_COMPDET		0X80
190  #define DA9052_STATUSB_SEQUENCING	0X40
191  #define DA9052_STATUSB_GPFB2		0X20
192  #define DA9052_STATUSB_CHGTO		0X10
193  #define DA9052_STATUSB_CHGEND		0X08
194  #define DA9052_STATUSB_CHGLIM		0X04
195  #define DA9052_STATUSB_CHGPRE		0X02
196  #define DA9052_STATUSB_CHGATT		0X01
197  
198  /* STATUS REGISTER C BITS */
199  #define DA9052_STATUSC_GPI7		0X80
200  #define DA9052_STATUSC_GPI6		0X40
201  #define DA9052_STATUSC_GPI5		0X20
202  #define DA9052_STATUSC_GPI4		0X10
203  #define DA9052_STATUSC_GPI3		0X08
204  #define DA9052_STATUSC_GPI2		0X04
205  #define DA9052_STATUSC_GPI1		0X02
206  #define DA9052_STATUSC_GPI0		0X01
207  
208  /* STATUS REGISTER D BITS */
209  #define DA9052_STATUSD_GPI15		0X80
210  #define DA9052_STATUSD_GPI14		0X40
211  #define DA9052_STATUSD_GPI13		0X20
212  #define DA9052_STATUSD_GPI12		0X10
213  #define DA9052_STATUSD_GPI11		0X08
214  #define DA9052_STATUSD_GPI10		0X04
215  #define DA9052_STATUSD_GPI9		0X02
216  #define DA9052_STATUSD_GPI8		0X01
217  
218  /* EVENT REGISTER A BITS */
219  #define DA9052_EVENTA_ECOMP1V2		0X80
220  #define DA9052_EVENTA_ESEQRDY		0X40
221  #define DA9052_EVENTA_EALRAM		0X20
222  #define DA9052_EVENTA_EVDDLOW		0X10
223  #define DA9052_EVENTA_EVBUSREM		0X08
224  #define DA9052_EVENTA_EDCINREM		0X04
225  #define DA9052_EVENTA_EVBUSDET		0X02
226  #define DA9052_EVENTA_EDCINDET		0X01
227  
228  /* EVENT REGISTER B BITS */
229  #define DA9052_EVENTB_ETSIREADY	0X80
230  #define DA9052_EVENTB_EPENDOWN		0X40
231  #define DA9052_EVENTB_EADCEOM		0X20
232  #define DA9052_EVENTB_ETBAT		0X10
233  #define DA9052_EVENTB_ECHGEND		0X08
234  #define DA9052_EVENTB_EIDGND		0X04
235  #define DA9052_EVENTB_EIDFLOAT		0X02
236  #define DA9052_EVENTB_ENONKEY		0X01
237  
238  /* EVENT REGISTER C BITS */
239  #define DA9052_EVENTC_EGPI7		0X80
240  #define DA9052_EVENTC_EGPI6		0X40
241  #define DA9052_EVENTC_EGPI5		0X20
242  #define DA9052_EVENTC_EGPI4		0X10
243  #define DA9052_EVENTC_EGPI3		0X08
244  #define DA9052_EVENTC_EGPI2		0X04
245  #define DA9052_EVENTC_EGPI1		0X02
246  #define DA9052_EVENTC_EGPI0		0X01
247  
248  /* EVENT REGISTER D BITS */
249  #define DA9052_EVENTD_EGPI15		0X80
250  #define DA9052_EVENTD_EGPI14		0X40
251  #define DA9052_EVENTD_EGPI13		0X20
252  #define DA9052_EVENTD_EGPI12		0X10
253  #define DA9052_EVENTD_EGPI11		0X08
254  #define DA9052_EVENTD_EGPI10		0X04
255  #define DA9052_EVENTD_EGPI9		0X02
256  #define DA9052_EVENTD_EGPI8		0X01
257  
258  /* IRQ MASK REGISTERS BITS */
259  #define DA9052_M_NONKEY		0X0100
260  
261  /* TSI EVENT REGISTERS BITS */
262  #define DA9052_E_PEN_DOWN		0X4000
263  #define DA9052_E_TSI_READY		0X8000
264  
265  /* FAULT LOG REGISTER BITS */
266  #define DA9052_FAULTLOG_WAITSET	0X80
267  #define DA9052_FAULTLOG_NSDSET		0X40
268  #define DA9052_FAULTLOG_KEYSHUT	0X20
269  #define DA9052_FAULTLOG_TEMPOVER	0X08
270  #define DA9052_FAULTLOG_VDDSTART	0X04
271  #define DA9052_FAULTLOG_VDDFAULT	0X02
272  #define DA9052_FAULTLOG_TWDERROR	0X01
273  
274  /* CONTROL REGISTER A BITS */
275  #define DA9052_CONTROLA_GPIV		0X80
276  #define DA9052_CONTROLA_PMOTYPE	0X20
277  #define DA9052_CONTROLA_PMOV		0X10
278  #define DA9052_CONTROLA_PMIV		0X08
279  #define DA9052_CONTROLA_PMIFV		0X08
280  #define DA9052_CONTROLA_PWR1EN		0X04
281  #define DA9052_CONTROLA_PWREN		0X02
282  #define DA9052_CONTROLA_SYSEN		0X01
283  
284  /* CONTROL REGISTER B BITS */
285  #define DA9052_CONTROLB_SHUTDOWN	0X80
286  #define DA9052_CONTROLB_DEEPSLEEP	0X40
287  #define DA9052_CONTROL_B_WRITEMODE	0X20
288  #define DA9052_CONTROLB_BBATEN		0X10
289  #define DA9052_CONTROLB_OTPREADEN	0X08
290  #define DA9052_CONTROLB_AUTOBOOT	0X04
291  #define DA9052_CONTROLB_ACTDIODE	0X02
292  #define DA9052_CONTROLB_BUCKMERGE	0X01
293  
294  /* CONTROL REGISTER C BITS */
295  #define DA9052_CONTROLC_BLINKDUR	0X80
296  #define DA9052_CONTROLC_BLINKFRQ	0X60
297  #define DA9052_CONTROLC_DEBOUNCING	0X1C
298  #define DA9052_CONTROLC_PMFB2PIN	0X02
299  #define DA9052_CONTROLC_PMFB1PIN	0X01
300  
301  /* CONTROL REGISTER D BITS */
302  #define DA9052_CONTROLD_WATCHDOG	0X80
303  #define DA9052_CONTROLD_ACCDETEN	0X40
304  #define DA9052_CONTROLD_GPI1415SD	0X20
305  #define DA9052_CONTROLD_NONKEYSD	0X10
306  #define DA9052_CONTROLD_KEEPACTEN	0X08
307  #define DA9052_CONTROLD_TWDSCALE	0X07
308  
309  /* POWER DOWN DISABLE REGISTER BITS */
310  #define DA9052_PDDIS_PMCONTPD		0X80
311  #define DA9052_PDDIS_OUT32KPD		0X40
312  #define DA9052_PDDIS_CHGBBATPD		0X20
313  #define DA9052_PDDIS_CHGPD		0X10
314  #define DA9052_PDDIS_HS2WIREPD		0X08
315  #define DA9052_PDDIS_PMIFPD		0X04
316  #define DA9052_PDDIS_GPADCPD		0X02
317  #define DA9052_PDDIS_GPIOPD		0X01
318  
319  /* CONTROL REGISTER D BITS */
320  #define DA9052_INTERFACE_IFBASEADDR	0XE0
321  #define DA9052_INTERFACE_NCSPOL	0X10
322  #define DA9052_INTERFACE_RWPOL		0X08
323  #define DA9052_INTERFACE_CPHA		0X04
324  #define DA9052_INTERFACE_CPOL		0X02
325  #define DA9052_INTERFACE_IFTYPE	0X01
326  
327  /* CONTROL REGISTER D BITS */
328  #define DA9052_RESET_RESETEVENT	0XC0
329  #define DA9052_RESET_RESETTIMER	0X3F
330  
331  /* GPIO REGISTERS */
332  /* GPIO CONTROL REGISTER BITS */
333  #define DA9052_GPIO_EVEN_PORT_PIN	0X03
334  #define DA9052_GPIO_EVEN_PORT_TYPE	0X04
335  #define DA9052_GPIO_EVEN_PORT_MODE	0X08
336  
337  #define DA9052_GPIO_ODD_PORT_PIN	0X30
338  #define DA9052_GPIO_ODD_PORT_TYPE	0X40
339  #define DA9052_GPIO_ODD_PORT_MODE	0X80
340  
341  /*POWER SEQUENCER REGISTER BITS */
342  /* SEQ CONTROL REGISTER BITS FOR ID 0 AND 1 */
343  #define DA9052_ID01_LDO1STEP		0XF0
344  #define DA9052_ID01_SYSPRE		0X04
345  #define DA9052_ID01_DEFSUPPLY		0X02
346  #define DA9052_ID01_NRESMODE		0X01
347  
348  /* SEQ CONTROL REGISTER BITS FOR ID 2 AND 3 */
349  #define DA9052_ID23_LDO3STEP		0XF0
350  #define DA9052_ID23_LDO2STEP		0X0F
351  
352  /* SEQ CONTROL REGISTER BITS FOR ID 4 AND 5 */
353  #define DA9052_ID45_LDO5STEP		0XF0
354  #define DA9052_ID45_LDO4STEP		0X0F
355  
356  /* SEQ CONTROL REGISTER BITS FOR ID 6 AND 7 */
357  #define DA9052_ID67_LDO7STEP		0XF0
358  #define DA9052_ID67_LDO6STEP		0X0F
359  
360  /* SEQ CONTROL REGISTER BITS FOR ID 8 AND 9 */
361  #define DA9052_ID89_LDO9STEP		0XF0
362  #define DA9052_ID89_LDO8STEP		0X0F
363  
364  /* SEQ CONTROL REGISTER BITS FOR ID 10 AND 11 */
365  #define DA9052_ID1011_PDDISSTEP	0XF0
366  #define DA9052_ID1011_LDO10STEP	0X0F
367  
368  /* SEQ CONTROL REGISTER BITS FOR ID 12 AND 13 */
369  #define DA9052_ID1213_VMEMSWSTEP	0XF0
370  #define DA9052_ID1213_VPERISWSTEP	0X0F
371  
372  /* SEQ CONTROL REGISTER BITS FOR ID 14 AND 15 */
373  #define DA9052_ID1415_BUCKPROSTEP	0XF0
374  #define DA9052_ID1415_BUCKCORESTEP	0X0F
375  
376  /* SEQ CONTROL REGISTER BITS FOR ID 16 AND 17 */
377  #define DA9052_ID1617_BUCKPERISTEP	0XF0
378  #define DA9052_ID1617_BUCKMEMSTEP	0X0F
379  
380  /* SEQ CONTROL REGISTER BITS FOR ID 18 AND 19 */
381  #define DA9052_ID1819_GPRISE2STEP	0XF0
382  #define DA9052_ID1819_GPRISE1STEP	0X0F
383  
384  /* SEQ CONTROL REGISTER BITS FOR ID 20 AND 21 */
385  #define DA9052_ID2021_GPFALL2STEP	0XF0
386  #define DA9052_ID2021_GPFALL1STEP	0X0F
387  
388  /* POWER SEQ STATUS REGISTER BITS */
389  #define DA9052_SEQSTATUS_SEQPOINTER	0XF0
390  #define DA9052_SEQSTATUS_WAITSTEP	0X0F
391  
392  /* POWER SEQ A REGISTER BITS */
393  #define DA9052_SEQA_POWEREND		0XF0
394  #define DA9052_SEQA_SYSTEMEND		0X0F
395  
396  /* POWER SEQ B REGISTER BITS */
397  #define DA9052_SEQB_PARTDOWN		0XF0
398  #define DA9052_SEQB_MAXCOUNT		0X0F
399  
400  /* POWER SEQ TIMER REGISTER BITS */
401  #define DA9052_SEQTIMER_SEQDUMMY	0XF0
402  #define DA9052_SEQTIMER_SEQTIME	0X0F
403  
404  /*POWER SUPPLY CONTROL REGISTER BITS */
405  /* BUCK REGISTER A BITS */
406  #define DA9052_BUCKA_BPROILIM		0XC0
407  #define DA9052_BUCKA_BPROMODE		0X30
408  #define DA9052_BUCKA_BCOREILIM		0X0C
409  #define DA9052_BUCKA_BCOREMODE		0X03
410  
411  /* BUCK REGISTER B BITS */
412  #define DA9052_BUCKB_BERIILIM		0XC0
413  #define DA9052_BUCKB_BPERIMODE		0X30
414  #define DA9052_BUCKB_BMEMILIM		0X0C
415  #define DA9052_BUCKB_BMEMMODE		0X03
416  
417  /* BUCKCORE REGISTER BITS */
418  #define DA9052_BUCKCORE_BCORECONF	0X80
419  #define DA9052_BUCKCORE_BCOREEN	0X40
420  #define DA9052_BUCKCORE_VBCORE		0X3F
421  
422  /* BUCKPRO REGISTER BITS */
423  #define DA9052_BUCKPRO_BPROCONF	0X80
424  #define DA9052_BUCKPRO_BPROEN		0X40
425  #define DA9052_BUCKPRO_VBPRO		0X3F
426  
427  /* BUCKMEM REGISTER BITS */
428  #define DA9052_BUCKMEM_BMEMCONF	0X80
429  #define DA9052_BUCKMEM_BMEMEN		0X40
430  #define DA9052_BUCKMEM_VBMEM		0X3F
431  
432  /* BUCKPERI REGISTER BITS */
433  #define DA9052_BUCKPERI_BPERICONF	0X80
434  #define DA9052_BUCKPERI_BPERIEN	0X40
435  #define DA9052_BUCKPERI_BPERIHS	0X20
436  #define DA9052_BUCKPERI_VBPERI		0X1F
437  
438  /* LDO1 REGISTER BITS */
439  #define DA9052_LDO1_LDO1CONF		0X80
440  #define DA9052_LDO1_LDO1EN		0X40
441  #define DA9052_LDO1_VLDO1		0X1F
442  
443  /* LDO2 REGISTER BITS */
444  #define DA9052_LDO2_LDO2CONF		0X80
445  #define DA9052_LDO2_LDO2EN		0X40
446  #define DA9052_LDO2_VLDO2		0X3F
447  
448  /* LDO3 REGISTER BITS */
449  #define DA9052_LDO3_LDO3CONF		0X80
450  #define DA9052_LDO3_LDO3EN		0X40
451  #define DA9052_LDO3_VLDO3		0X3F
452  
453  /* LDO4 REGISTER BITS */
454  #define DA9052_LDO4_LDO4CONF		0X80
455  #define DA9052_LDO4_LDO4EN		0X40
456  #define DA9052_LDO4_VLDO4		0X3F
457  
458  /* LDO5 REGISTER BITS */
459  #define DA9052_LDO5_LDO5CONF		0X80
460  #define DA9052_LDO5_LDO5EN		0X40
461  #define DA9052_LDO5_VLDO5		0X3F
462  
463  /* LDO6 REGISTER BITS */
464  #define DA9052_LDO6_LDO6CONF		0X80
465  #define DA9052_LDO6_LDO6EN		0X40
466  #define DA9052_LDO6_VLDO6		0X3F
467  
468  /* LDO7 REGISTER BITS */
469  #define DA9052_LDO7_LDO7CONF		0X80
470  #define DA9052_LDO7_LDO7EN		0X40
471  #define DA9052_LDO7_VLDO7		0X3F
472  
473  /* LDO8 REGISTER BITS */
474  #define DA9052_LDO8_LDO8CONF		0X80
475  #define DA9052_LDO8_LDO8EN		0X40
476  #define DA9052_LDO8_VLDO8		0X3F
477  
478  /* LDO9 REGISTER BITS */
479  #define DA9052_LDO9_LDO9CONF		0X80
480  #define DA9052_LDO9_LDO9EN		0X40
481  #define DA9052_LDO9_VLDO9		0X3F
482  
483  /* LDO10 REGISTER BITS */
484  #define DA9052_LDO10_LDO10CONF		0X80
485  #define DA9052_LDO10_LDO10EN		0X40
486  #define DA9052_LDO10_VLDO10		0X3F
487  
488  /* SUPPLY REGISTER BITS */
489  #define DA9052_SUPPLY_VLOCK		0X80
490  #define DA9052_SUPPLY_VMEMSWEN		0X40
491  #define DA9052_SUPPLY_VPERISWEN	0X20
492  #define DA9052_SUPPLY_VLDO3GO		0X10
493  #define DA9052_SUPPLY_VLDO2GO		0X08
494  #define DA9052_SUPPLY_VBMEMGO		0X04
495  #define DA9052_SUPPLY_VBPROGO		0X02
496  #define DA9052_SUPPLY_VBCOREGO		0X01
497  
498  /* PULLDOWN REGISTER BITS */
499  #define DA9052_PULLDOWN_LDO5PDDIS	0X20
500  #define DA9052_PULLDOWN_LDO2PDDIS	0X10
501  #define DA9052_PULLDOWN_LDO1PDDIS	0X08
502  #define DA9052_PULLDOWN_MEMPDDIS	0X04
503  #define DA9052_PULLDOWN_PROPDDIS	0X02
504  #define DA9052_PULLDOWN_COREPDDIS	0X01
505  
506  /* BAT CHARGER REGISTER BITS */
507  /* CHARGER BUCK REGISTER BITS */
508  #define DA9052_CHGBUCK_CHGTEMP		0X80
509  #define DA9052_CHGBUCK_CHGUSBILIM	0X40
510  #define DA9052_CHGBUCK_CHGBUCKLP	0X20
511  #define DA9052_CHGBUCK_CHGBUCKEN	0X10
512  #define DA9052_CHGBUCK_ISETBUCK	0X0F
513  
514  /* WAIT COUNTER REGISTER BITS */
515  #define DA9052_WAITCONT_WAITDIR	0X80
516  #define DA9052_WAITCONT_RTCCLOCK	0X40
517  #define DA9052_WAITCONT_WAITMODE	0X20
518  #define DA9052_WAITCONT_EN32KOUT	0X10
519  #define DA9052_WAITCONT_DELAYTIME	0X0F
520  
521  /* ISET CONTROL REGISTER BITS */
522  #define DA9052_ISET_ISETDCIN		0XF0
523  #define DA9052_ISET_ISETVBUS		0X0F
524  
525  /* BATTERY CHARGER CONTROL REGISTER BITS */
526  #define DA9052_BATCHG_ICHGPRE		0XC0
527  #define DA9052_BATCHG_ICHGBAT		0X3F
528  
529  /* CHARGER COUNTER REGISTER BITS */
530  #define DA9052_CHG_CONT_VCHG_BAT	0XF8
531  #define DA9052_CHG_CONT_TCTR		0X07
532  
533  /* INPUT CONTROL REGISTER BITS */
534  #define DA9052_INPUT_CONT_TCTR_MODE	0X80
535  #define DA9052_INPUT_CONT_VBUS_SUSP	0X10
536  #define DA9052_INPUT_CONT_DCIN_SUSP	0X08
537  
538  /* CHARGING TIME REGISTER BITS */
539  #define DA9052_CHGTIME_CHGTIME		0XFF
540  
541  /* BACKUP BATTERY CONTROL REGISTER BITS */
542  #define DA9052_BBATCONT_BCHARGERISET	0XF0
543  #define DA9052_BBATCONT_BCHARGERVSET	0X0F
544  
545  /* LED REGISTERS BITS */
546  /* LED BOOST REGISTER BITS */
547  #define DA9052_BOOST_EBFAULT		0X80
548  #define DA9052_BOOST_MBFAULT		0X40
549  #define DA9052_BOOST_BOOSTFRQ		0X20
550  #define DA9052_BOOST_BOOSTILIM		0X10
551  #define DA9052_BOOST_LED3INEN		0X08
552  #define DA9052_BOOST_LED2INEN		0X04
553  #define DA9052_BOOST_LED1INEN		0X02
554  #define DA9052_BOOST_BOOSTEN		0X01
555  
556  /* LED CONTROL REGISTER BITS */
557  #define DA9052_LEDCONT_SELLEDMODE	0X80
558  #define DA9052_LEDCONT_LED3ICONT	0X40
559  #define DA9052_LEDCONT_LED3RAMP	0X20
560  #define DA9052_LEDCONT_LED3EN		0X10
561  #define DA9052_LEDCONT_LED2RAMP	0X08
562  #define DA9052_LEDCONT_LED2EN		0X04
563  #define DA9052_LEDCONT_LED1RAMP	0X02
564  #define DA9052_LEDCONT_LED1EN		0X01
565  
566  /* LEDMIN123 REGISTER BIT */
567  #define DA9052_LEDMIN123_LEDMINCURRENT	0XFF
568  
569  /* LED1CONF REGISTER BIT */
570  #define DA9052_LED1CONF_LED1CURRENT	0XFF
571  
572  /* LED2CONF REGISTER BIT */
573  #define DA9052_LED2CONF_LED2CURRENT	0XFF
574  
575  /* LED3CONF REGISTER BIT */
576  #define DA9052_LED3CONF_LED3CURRENT	0XFF
577  
578  /* LED COUNT REGISTER BIT */
579  #define DA9052_LED_CONT_DIM		0X80
580  
581  /* ADC MAN REGISTERS BITS */
582  #define DA9052_ADC_MAN_MAN_CONV	0X10
583  #define DA9052_ADC_MAN_MUXSEL_VDDOUT	0X00
584  #define DA9052_ADC_MAN_MUXSEL_ICH	0X01
585  #define DA9052_ADC_MAN_MUXSEL_TBAT	0X02
586  #define DA9052_ADC_MAN_MUXSEL_VBAT	0X03
587  #define DA9052_ADC_MAN_MUXSEL_AD4	0X04
588  #define DA9052_ADC_MAN_MUXSEL_AD5	0X05
589  #define DA9052_ADC_MAN_MUXSEL_AD6	0X06
590  #define DA9052_ADC_MAN_MUXSEL_VBBAT	0X09
591  
592  /* ADC CONTROL REGSISTERS BITS */
593  #define DA9052_ADCCONT_COMP1V2EN	0X80
594  #define DA9052_ADCCONT_ADCMODE		0X40
595  #define DA9052_ADCCONT_TBATISRCEN	0X20
596  #define DA9052_ADCCONT_AD4ISRCEN	0X10
597  #define DA9052_ADCCONT_AUTOAD6EN	0X08
598  #define DA9052_ADCCONT_AUTOAD5EN	0X04
599  #define DA9052_ADCCONT_AUTOAD4EN	0X02
600  #define DA9052_ADCCONT_AUTOVDDEN	0X01
601  
602  /* ADC 10 BIT MANUAL CONVERSION RESULT LOW REGISTER */
603  #define DA9052_ADC_RES_LSB		0X03
604  
605  /* ADC 10 BIT MANUAL CONVERSION RESULT HIGH REGISTER */
606  #define DA9052_ADCRESH_ADCRESMSB	0XFF
607  
608  /* VDD RES REGSISTER BIT*/
609  #define DA9052_VDDRES_VDDOUTRES	0XFF
610  
611  /* VDD MON REGSISTER BIT */
612  #define DA9052_VDDMON_VDDOUTMON	0XFF
613  
614  /* ICHG_AV REGSISTER BIT */
615  #define DA9052_ICHGAV_ICHGAV		0XFF
616  
617  /* ICHG_THD REGSISTER BIT */
618  #define DA9052_ICHGTHD_ICHGTHD		0XFF
619  
620  /* ICHG_END REGSISTER BIT */
621  #define DA9052_ICHGEND_ICHGEND		0XFF
622  
623  /* TBAT_RES REGSISTER BIT */
624  #define DA9052_TBATRES_TBATRES		0XFF
625  
626  /* TBAT_HIGHP REGSISTER BIT */
627  #define DA9052_TBATHIGHP_TBATHIGHP	0XFF
628  
629  /* TBAT_HIGHN REGSISTER BIT */
630  #define DA9052_TBATHIGHN_TBATHIGHN	0XFF
631  
632  /* TBAT_LOW REGSISTER BIT */
633  #define DA9052_TBATLOW_TBATLOW		0XFF
634  
635  /* T_OFFSET REGSISTER BIT */
636  #define DA9052_TOFFSET_TOFFSET		0XFF
637  
638  /* ADCIN4_RES REGSISTER BIT */
639  #define DA9052_ADCIN4RES_ADCIN4RES	0XFF
640  
641  /* ADCIN4_HIGH REGSISTER BIT */
642  #define DA9052_AUTO4HIGH_AUTO4HIGH	0XFF
643  
644  /* ADCIN4_LOW REGSISTER BIT */
645  #define DA9052_AUTO4LOW_AUTO4LOW	0XFF
646  
647  /* ADCIN5_RES REGSISTER BIT */
648  #define DA9052_ADCIN5RES_ADCIN5RES	0XFF
649  
650  /* ADCIN5_HIGH REGSISTER BIT */
651  #define DA9052_AUTO5HIGH_AUTOHIGH	0XFF
652  
653  /* ADCIN5_LOW REGSISTER BIT */
654  #define DA9052_AUTO5LOW_AUTO5LOW	0XFF
655  
656  /* ADCIN6_RES REGSISTER BIT */
657  #define DA9052_ADCIN6RES_ADCIN6RES	0XFF
658  
659  /* ADCIN6_HIGH REGSISTER BIT */
660  #define DA9052_AUTO6HIGH_AUTO6HIGH	0XFF
661  
662  /* ADCIN6_LOW REGSISTER BIT */
663  #define DA9052_AUTO6LOW_AUTO6LOW	0XFF
664  
665  /* TJUNC_RES REGSISTER BIT*/
666  #define DA9052_TJUNCRES_TJUNCRES	0XFF
667  
668  /* TSI REGISTER */
669  /* TSI CONTROL REGISTER A BITS */
670  #define DA9052_TSICONTA_TSIDELAY	0XC0
671  #define DA9052_TSICONTA_TSISKIP	0X38
672  #define DA9052_TSICONTA_TSIMODE	0X04
673  #define DA9052_TSICONTA_PENDETEN	0X02
674  #define DA9052_TSICONTA_AUTOTSIEN	0X01
675  
676  /* TSI CONTROL REGISTER B BITS */
677  #define DA9052_TSICONTB_ADCREF		0X80
678  #define DA9052_TSICONTB_TSIMAN		0X40
679  #define DA9052_TSICONTB_TSIMUX_XP	0X00
680  #define DA9052_TSICONTB_TSIMUX_YP	0X10
681  #define DA9052_TSICONTB_TSIMUX_XN	0X20
682  #define DA9052_TSICONTB_TSIMUX_YN	0X30
683  #define DA9052_TSICONTB_TSISEL3	0X08
684  #define DA9052_TSICONTB_TSISEL2	0X04
685  #define DA9052_TSICONTB_TSISEL1	0X02
686  #define DA9052_TSICONTB_TSISEL0	0X01
687  
688  /* TSI X CO-ORDINATE MSB RESULT REGISTER BITS */
689  #define DA9052_TSIXMSB_TSIXM		0XFF
690  
691  /* TSI Y CO-ORDINATE MSB RESULT REGISTER BITS */
692  #define DA9052_TSIYMSB_TSIYM		0XFF
693  
694  /* TSI CO-ORDINATE LSB RESULT REGISTER BITS */
695  #define DA9052_TSILSB_PENDOWN		0X40
696  #define DA9052_TSILSB_TSIZL		0X30
697  #define DA9052_TSILSB_TSIZL_SHIFT	4
698  #define DA9052_TSILSB_TSIZL_BITS	2
699  #define DA9052_TSILSB_TSIYL		0X0C
700  #define DA9052_TSILSB_TSIYL_SHIFT	2
701  #define DA9052_TSILSB_TSIYL_BITS	2
702  #define DA9052_TSILSB_TSIXL		0X03
703  #define DA9052_TSILSB_TSIXL_SHIFT	0
704  #define DA9052_TSILSB_TSIXL_BITS	2
705  
706  /* TSI Z MEASUREMENT MSB RESULT REGISTER BIT */
707  #define DA9052_TSIZMSB_TSIZM		0XFF
708  
709  /* RTC REGISTER */
710  /* RTC TIMER SECONDS REGISTER BITS */
711  #define DA9052_COUNTS_MONITOR		0X40
712  #define DA9052_RTC_SEC			0X3F
713  
714  /* RTC TIMER MINUTES REGISTER BIT */
715  #define DA9052_RTC_MIN			0X3F
716  
717  /* RTC TIMER HOUR REGISTER BIT */
718  #define DA9052_RTC_HOUR		0X1F
719  
720  /* RTC TIMER DAYS REGISTER BIT */
721  #define DA9052_RTC_DAY			0X1F
722  
723  /* RTC TIMER MONTHS REGISTER BIT */
724  #define DA9052_RTC_MONTH		0X0F
725  
726  /* RTC TIMER YEARS REGISTER BIT */
727  #define DA9052_RTC_YEAR		0X3F
728  
729  /* RTC ALARM MINUTES REGISTER BITS */
730  #define DA9052_ALARMM_I_TICK_TYPE	0X80
731  #define DA9052_ALARMMI_ALARMTYPE	0X40
732  
733  /* RTC ALARM YEARS REGISTER BITS */
734  #define DA9052_ALARM_Y_TICK_ON		0X80
735  #define DA9052_ALARM_Y_ALARM_ON	0X40
736  
737  /* RTC SECONDS REGISTER A BITS */
738  #define DA9052_SECONDA_SECONDSA	0XFF
739  
740  /* RTC SECONDS REGISTER B BITS */
741  #define DA9052_SECONDB_SECONDSB	0XFF
742  
743  /* RTC SECONDS REGISTER C BITS */
744  #define DA9052_SECONDC_SECONDSC	0XFF
745  
746  /* RTC SECONDS REGISTER D BITS */
747  #define DA9052_SECONDD_SECONDSD	0XFF
748  
749  #endif
750  /* __LINUX_MFD_DA9052_REG_H */
751