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Searched refs:CSR_TIMER2_CLR (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/arch/arm/mach-footbridge/
Ddc21285-timer.c31 *CSR_TIMER2_CLR = 0; in cksrc_dc21285_enable()
/linux-6.12.1/arch/arm/include/asm/hardware/
Ddec21285.h121 #define CSR_TIMER2_CLR DC21285_IO(0x032c) macro