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Searched refs:CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h1643 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK 0x20000000 macro
Dgfx_8_1_sh_mask.h2627 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK 0x20000000 macro
Dgfx_8_0_sh_mask.h2105 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK 0x20000000 macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11458 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_9_1_sh_mask.h12934 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_9_4_3_sh_mask.h14661 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_9_2_1_sh_mask.h12719 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_9_4_2_sh_mask.h2854 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_11_5_0_sh_mask.h12634 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_11_0_0_sh_mask.h15940 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_11_0_3_sh_mask.h18131 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_10_1_0_sh_mask.h18423 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro
Dgc_10_3_0_sh_mask.h16771 #define CP_ME2_PIPE2_INT_CNTL__GENERIC2_INT_ENABLE_MASK … macro