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Searched refs:CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h1568 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
Dgfx_8_1_sh_mask.h2536 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
Dgfx_8_0_sh_mask.h2014 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11339 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_1_sh_mask.h12815 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_4_3_sh_mask.h14542 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_2_1_sh_mask.h12600 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_4_2_sh_mask.h2735 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_11_5_0_sh_mask.h12515 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_11_0_0_sh_mask.h15821 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_11_0_3_sh_mask.h18012 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_10_1_0_sh_mask.h18304 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_10_3_0_sh_mask.h16652 #define CP_ME1_PIPE2_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro