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Searched refs:CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h1548 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
Dgfx_8_1_sh_mask.h2512 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
Dgfx_8_0_sh_mask.h1990 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT 0x1f macro
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11312 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_1_sh_mask.h12788 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_4_3_sh_mask.h14515 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_2_1_sh_mask.h12573 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_9_4_2_sh_mask.h2708 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_11_5_0_sh_mask.h12488 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_11_0_0_sh_mask.h15794 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_12_0_0_sh_mask.h12203 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_11_0_3_sh_mask.h17985 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_10_1_0_sh_mask.h18277 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro
Dgc_10_3_0_sh_mask.h16625 #define CP_ME1_PIPE1_INT_CNTL__GENERIC0_INT_ENABLE__SHIFT … macro