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Searched refs:CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13198 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_9_1_sh_mask.h14498 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_9_4_3_sh_mask.h16730 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_9_2_1_sh_mask.h14361 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_9_4_2_sh_mask.h4296 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_11_5_0_sh_mask.h14435 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_11_0_0_sh_mask.h17741 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_12_0_0_sh_mask.h13622 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_11_0_3_sh_mask.h19986 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_10_1_0_sh_mask.h20621 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro
Dgc_10_3_0_sh_mask.h18774 #define CP_HQD_AQL_CONTROL__CONTROL1_EN_MASK … macro