Searched refs:CPT_AF_LFX_CTL2 (Results 1 – 3 of 3) sorted by relevance
/linux-6.12.1/drivers/net/ethernet/marvell/octeontx2/af/ |
D | rvu_cpt.c | 504 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_alloc() 508 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in rvu_mbox_handler_cpt_lf_alloc() 591 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_inbound() 594 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_inbound() 644 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_outbound() 646 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_outbound() 710 (offset & 0xFF000) == CPT_AF_LFX_CTL2(0)) { in validate_and_update_reg_offset() 970 ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_reset() 978 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2); in rvu_mbox_handler_cpt_lf_reset()
|
D | rvu_reg.h | 511 #define CPT_AF_LFX_CTL2(a) (0x29000ull | (u64)(a) << 3) macro
|
D | rvu_debugfs.c | 3738 reg = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(lf)); in rvu_dbg_cpt_lfs_info_display()
|