Searched refs:CPOL (Results 1 – 4 of 4) sorted by relevance
421 new_polarity = (asd->csr & SPI_BIT(CPOL)) != 0; in cs_activate()434 u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; in cs_activate()441 if ((csr ^ cpol) & SPI_BIT(CPOL)) in cs_activate()443 csr ^ SPI_BIT(CPOL)); in cs_activate()1293 csr |= SPI_BIT(CPOL); in atmel_spi_setup()
30 #define CPOL BIT(2) macro410 cpol = CPOL; in setup_fifo_params()
52 spi-cpol; /* SPI mode: CPOL=1 */
100 - CPOL indicates the initial clock polarity. CPOL=0 means the102 the second (trailing) edge is falling. CPOL=1 means the clock113 but their timing diagrams will make the CPOL and CPHA modes clear.115 In the SPI mode number, CPOL is the high order bit and CPHA is the117 starting low (CPOL=0) and data stabilized for sampling during the622 each other. For example, in SPI mode 0 (CPOL=0, CPHA=0) the bus lines may behave