Searched refs:CPG_PLLECR (Results 1 – 3 of 3) sorted by relevance
28 #define CPG_PLLECR 0xd0 macro108 if (readl(base + CPG_PLLECR) & BIT(enable_bit)) { in sh73a0_cpg_register_clock()
29 #define CPG_PLLECR 0x00d0 /* PLL Enable Control Register */ macro139 pll_clk->pllecr_reg = base + CPG_PLLECR; in cpg_pll_clk_register()
31 #define CPG_PLLECR 0x0820 /* PLL Enable Control Register */ macro249 pll_clk->pllecr_reg = base + CPG_PLLECR; in cpg_pll_clk_register()