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Searched refs:CPG_PLL3CR (Results 1 – 1 of 1) sorted by relevance

/linux-6.12.1/drivers/clk/renesas/
Dclk-sh73a0.c32 #define CPG_PLL3CR 0xdc macro
103 enable_reg += CPG_PLL3CR; in sh73a0_cpg_register_clock()