Searched refs:CNTX_BUSY_INT_ENABLE (Results 1 – 16 of 16) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/radeon/ |
D | nid.h | 495 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
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D | sid.h | 1279 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
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D | cikd.h | 1332 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
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D | si.c | 5133 tmp |= (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in si_enable_gui_idle_interrupt() 5135 tmp &= ~(CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in si_enable_gui_idle_interrupt() 5934 (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in si_disable_interrupt_state() 6052 (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in si_irq_set()
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D | evergreen.c | 4464 CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in evergreen_disable_interrupt_state() 4470 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in evergreen_disable_interrupt_state() 4493 u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE; in evergreen_irq_set()
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D | evergreend.h | 1247 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
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D | cik.c | 5763 tmp |= (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in cik_enable_gui_idle_interrupt() 5765 tmp &= ~(CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in cik_enable_gui_idle_interrupt() 6860 (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in cik_disable_interrupt_state() 7038 (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in cik_irq_set()
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D | r600d.h | 715 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
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D | r600.c | 3622 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in r600_disable_interrupt_state() 3763 u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE; in r600_irq_set()
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/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | sid.h | 1307 # define CNTX_BUSY_INT_ENABLE (1 << 19) macro
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D | gfx_v11_0.c | 2037 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, in gfx_v11_0_enable_gui_idle_interrupt() 4788 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 0); in gfx_v11_0_soft_reset() 4898 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v11_0_soft_reset() 5240 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v11_0_update_coarse_grain_clock_gating()
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D | gfx_v12_0.c | 1750 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, in gfx_v12_0_enable_gui_idle_interrupt() 3945 data = REG_SET_FIELD(data, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 1); in gfx_v12_0_update_coarse_grain_clock_gating()
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D | gfx_v9_4_3.c | 1481 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0); in gfx_v9_4_3_xcc_enable_gui_idle_interrupt()
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D | gfx_v8_0.c | 3854 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0); in gfx_v8_0_enable_gui_idle_interrupt()
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D | gfx_v9_0.c | 2701 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0); in gfx_v9_0_enable_gui_idle_interrupt()
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D | gfx_v10_0.c | 5279 tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, in gfx_v10_0_enable_gui_idle_interrupt()
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