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Searched refs:CLK_VPP1_SVPP2_VDO1_DL_RELAY (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8188-vpp1.c74 GATE_VPP1_1(CLK_VPP1_SVPP2_VDO1_DL_RELAY, "vpp1_svpp2_vdo1_dl_relay", "top_vpp", 8),
Dclk-mt8195-vpp1.c68 GATE_VPP1_1(CLK_VPP1_SVPP2_VDO1_DL_RELAY, "vpp1_svpp2_vdo1_dl_relay", "top_vpp", 2),
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h479 #define CLK_VPP1_SVPP2_VDO1_DL_RELAY 39 macro
Dmt8195-clk.h578 #define CLK_VPP1_SVPP2_VDO1_DL_RELAY 34 macro