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Searched refs:CLK_VPP1_SVPP2_MDP_HDR (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8188-vpp1.c69 GATE_VPP1_1(CLK_VPP1_SVPP2_MDP_HDR, "vpp1_svpp2_mdp_hdr", "top_vpp", 2),
Dclk-mt8195-vpp1.c61 GATE_VPP1_0(CLK_VPP1_SVPP2_MDP_HDR, "vpp1_svpp2_mdp_hdr", "top_vpp", 28),
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h474 #define CLK_VPP1_SVPP2_MDP_HDR 34 macro
Dmt8195-clk.h572 #define CLK_VPP1_SVPP2_MDP_HDR 28 macro
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8195.dtsi2377 clocks = <&vppsys1 CLK_VPP1_SVPP2_MDP_HDR>;