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Searched refs:CLK_VPP1_DL_ASYNC (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8195-vpp1.c63 GATE_VPP1_0(CLK_VPP1_DL_ASYNC, "vpp1_dl_async", "top_vpp", 30),
/linux-6.12.1/include/dt-bindings/clock/
Dmt8195-clk.h574 #define CLK_VPP1_DL_ASYNC 30 macro