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Searched refs:CLK_VPP0_WARP1_ASYNC (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8188-vpp0.c91 GATE_VPP0_2(CLK_VPP0_WARP1_ASYNC, "vpp0_warp1_async", "top_wpe_vpp", 3),
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h403 #define CLK_VPP0_WARP1_ASYNC 44 macro