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Searched refs:CLK_VPP0_GALS_VDEC_VDEC_CORE1 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8195-vpp0.c73 GATE_VPP0_1(CLK_VPP0_GALS_VDEC_VDEC_CORE1, "vpp0_gals_vdec_vdec_core1", "top_vpp", 20),
Dclk-mt8188-vpp0.c75 GATE_VPP0_1(CLK_VPP0_GALS_VDEC_VDEC_CORE1, "vpp0_gals_vdec_vdec_core1", "top_vpp", 20),
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h389 #define CLK_VPP0_GALS_VDEC_VDEC_CORE1 30 macro
Dmt8195-clk.h463 #define CLK_VPP0_GALS_VDEC_VDEC_CORE1 30 macro
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8195.dtsi604 <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>,
2167 clocks = <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>,
2168 <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>,
2169 <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>;
2924 clocks = <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>,
2958 clocks = <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>,
Dmt8188.dtsi1013 <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>,