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Searched refs:CLK_VPP0_DSIP_RDMA (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8188-vpp0.c84 GATE_VPP0_1(CLK_VPP0_DSIP_RDMA, "vpp0_dsip_rdma", "top_vpp", 28),
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h397 #define CLK_VPP0_DSIP_RDMA 38 macro