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Searched refs:CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8195-vdo1.c79 GATE_VDO1_0(CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC, "vdo1_vpp3_to_vdo1_dl_async", "top_vpp", 15),
Dclk-mt8188-vdo1.c83 GATE_VDO1_1(CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC, "vdo1_vpp3_to_vdo1_dl_async", "top_vpp", 3),
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h678 #define CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC 15 macro
Dmt8195-clk.h827 #define CLK_VDO1_VPP3_TO_VDO1_DL_ASYNC 15 macro