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Searched refs:CLK_VDO0_DL_ASYNC2 (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8188-vdo0.c71 GATE_VDO0_1(CLK_VDO0_DL_ASYNC2, "vdo0_dl_async2", "top_vpp", 5),
Dclk-mt8195-vdo0.c75 GATE_VDO0_1(CLK_VDO0_DL_ASYNC2, "vdo0_dl_async2", "top_vpp", 2),
/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt8188-clk.h648 #define CLK_VDO0_DL_ASYNC2 21 macro
Dmt8195-clk.h791 #define CLK_VDO0_DL_ASYNC2 28 macro