Searched refs:CLK_TOP_UNIVPLL_D4 (Results 1 – 11 of 11) sorted by relevance
/linux-6.12.1/include/dt-bindings/clock/ |
D | mt8516-clk.h | 52 #define CLK_TOP_UNIVPLL_D4 20 macro
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D | mt8192-clk.h | 99 #define CLK_TOP_UNIVPLL_D4 87 macro
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D | mediatek,mt8188-clk.h | 123 #define CLK_TOP_UNIVPLL_D4 112 macro
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D | mt8195-clk.h | 156 #define CLK_TOP_UNIVPLL_D4 144 macro
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/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt8516.c | 47 FACTOR(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4),
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D | clk-mt8167.c | 50 FACTOR(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4),
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D | clk-mt8188-topckgen.c | 47 FACTOR(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4),
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D | clk-mt8195-topckgen.c | 58 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4, 0),
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D | clk-mt8192.c | 45 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4, 0),
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8195.dtsi | 2856 <&topckgen CLK_TOP_UNIVPLL_D4>; 2859 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; 2876 <&topckgen CLK_TOP_UNIVPLL_D4>; 2879 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; 2900 <&topckgen CLK_TOP_UNIVPLL_D4>; 2903 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>; 3010 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
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D | mt8192.dtsi | 1828 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
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