Home
last modified time | relevance | path

Searched refs:CLK_TOP_UNIVPLL_D4 (Results 1 – 11 of 11) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt8516-clk.h52 #define CLK_TOP_UNIVPLL_D4 20 macro
Dmt8192-clk.h99 #define CLK_TOP_UNIVPLL_D4 87 macro
Dmediatek,mt8188-clk.h123 #define CLK_TOP_UNIVPLL_D4 112 macro
Dmt8195-clk.h156 #define CLK_TOP_UNIVPLL_D4 144 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8516.c47 FACTOR(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4),
Dclk-mt8167.c50 FACTOR(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4),
Dclk-mt8188-topckgen.c47 FACTOR(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4),
Dclk-mt8195-topckgen.c58 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4, 0),
Dclk-mt8192.c45 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D4, "univpll_d4", "univpll", 1, 4, 0),
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8195.dtsi2856 <&topckgen CLK_TOP_UNIVPLL_D4>;
2859 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
2876 <&topckgen CLK_TOP_UNIVPLL_D4>;
2879 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
2900 <&topckgen CLK_TOP_UNIVPLL_D4>;
2903 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
3010 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
Dmt8192.dtsi1828 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;