Searched refs:CLK_TOP_UNIVPLL_D3_D8 (Results 1 – 7 of 7) sorted by relevance
| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt6779-clk.h | 79 #define CLK_TOP_UNIVPLL_D3_D8 69 macro
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| D | mt8183-clk.h | 104 #define CLK_TOP_UNIVPLL_D3_D8 68 macro
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| D | mt8186-clk.h | 107 #define CLK_TOP_UNIVPLL_D3_D8 88 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt8186-topckgen.c | 42 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3_D8, "univpll_d3_d8", "univpll_d3", 1, 8, 0),
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| D | clk-mt8183.c | 59 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3_D8, "univpll_d3_d8", "univpll_d3", 1, 8, 0),
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| D | clk-mt6779.c | 51 FACTOR(CLK_TOP_UNIVPLL_D3_D8, "univpll_d3_d8", "univpll_d3", 1, 8),
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8186.dtsi | 1194 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3_D8>;
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