Searched refs:CLK_TOP_SYSPLL_D2_D4 (Results 1 – 5 of 5) sorted by relevance
/linux-6.12.1/sound/soc/mediatek/mt8183/ |
D | mt8183-afe-clk.c | 28 CLK_TOP_SYSPLL_D2_D4, enumerator 68 [CLK_TOP_SYSPLL_D2_D4] = "top_syspll_d2_d4", 151 afe_priv->clk[CLK_TOP_SYSPLL_D2_D4]); in mt8183_afe_enable_clock() 155 aud_clks[CLK_TOP_SYSPLL_D2_D4], ret); in mt8183_afe_enable_clock()
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/linux-6.12.1/Documentation/devicetree/bindings/sound/ |
D | mt8183-afe-pcm.txt | 34 <&topckgen CLK_TOP_SYSPLL_D2_D4>,
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/linux-6.12.1/include/dt-bindings/clock/ |
D | mt8183-clk.h | 84 #define CLK_TOP_SYSPLL_D2_D4 48 macro
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/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt8183.c | 38 FACTOR_FLAGS(CLK_TOP_SYSPLL_D2_D4, "syspll_d2_d4", "syspll_d2", 1, 4, 0),
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8183.dtsi | 1477 <&topckgen CLK_TOP_SYSPLL_D2_D4>,
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