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Searched refs:CLK_TOP_SYSPLL3_D2 (Results 1 – 23 of 23) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7629-clk.h43 #define CLK_TOP_SYSPLL3_D2 33 macro
Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
Dmediatek,mt6795-clk.h60 #define CLK_TOP_SYSPLL3_D2 49 macro
Dmt6797-clk.h57 #define CLK_TOP_SYSPLL3_D2 47 macro
Dmt8173-clk.h62 #define CLK_TOP_SYSPLL3_D2 52 macro
Dmt6765-clk.h46 #define CLK_TOP_SYSPLL3_D2 11 macro
Dmediatek,mt8365-clk.h26 #define CLK_TOP_SYSPLL3_D2 16 macro
Dmt2712-clk.h45 #define CLK_TOP_SYSPLL3_D2 14 macro
Dmt2701-clk.h23 #define CLK_TOP_SYSPLL3_D2 13 macro
/linux-6.12.1/arch/arm/boot/dts/mediatek/
Dmt2701.dtsi342 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
402 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
415 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
Dmt7623.dtsi487 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
566 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
580 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
Dmt7629.dtsi281 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt6795-topckgen.c414 FACTOR_FLAGS(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "main_h218p4m", 1, 2, 0),
Dclk-mt8173-topckgen.c493 FACTOR_FLAGS(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "main_h218p4m", 1, 2, 0),
Dclk-mt7622.c279 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "mainpll", 1, 10),
Dclk-mt7629.c386 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "mainpll", 1, 10),
Dclk-mt6797.c37 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2),
Dclk-mt8365.c45 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "mainpll", 1, 10),
Dclk-mt2712.c53 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2),
Dclk-mt2701.c69 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2),
Dclk-mt6765.c94 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2),
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi498 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
590 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
Dmt8173.dtsi770 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,