| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt7981b.dtsi | 150 <&topckgen CLK_TOP_SPI_SEL>,
164 <&topckgen CLK_TOP_SPI_SEL>,
178 <&topckgen CLK_TOP_SPI_SEL>,
|
| D | mt2712e.dtsi | 557 <&topckgen CLK_TOP_SPI_SEL>,
636 <&topckgen CLK_TOP_SPI_SEL>,
649 <&topckgen CLK_TOP_SPI_SEL>,
662 <&topckgen CLK_TOP_SPI_SEL>,
675 <&topckgen CLK_TOP_SPI_SEL>,
|
| D | mt8192.dtsi | 795 <&topckgen CLK_TOP_SPI_SEL>,
843 <&topckgen CLK_TOP_SPI_SEL>,
857 <&topckgen CLK_TOP_SPI_SEL>,
871 <&topckgen CLK_TOP_SPI_SEL>,
885 <&topckgen CLK_TOP_SPI_SEL>,
899 <&topckgen CLK_TOP_SPI_SEL>,
913 <&topckgen CLK_TOP_SPI_SEL>,
927 <&topckgen CLK_TOP_SPI_SEL>,
|
| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt7986-clk.h | 51 #define CLK_TOP_SPI_SEL 28 macro
|
| D | mt8135-clk.h | 87 #define CLK_TOP_SPI_SEL 76 macro
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| D | mediatek,mt7981-clk.h | 91 #define CLK_TOP_SPI_SEL 78 macro
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| D | mt8516-clk.h | 189 #define CLK_TOP_SPI_SEL 157 macro
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| D | mediatek,mt7988-clk.h | 70 #define CLK_TOP_SPI_SEL 42 macro
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| D | mediatek,mt6795-clk.h | 100 #define CLK_TOP_SPI_SEL 89 macro
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| D | mt8173-clk.h | 102 #define CLK_TOP_SPI_SEL 92 macro
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| D | mt6765-clk.h | 142 #define CLK_TOP_SPI_SEL 107 macro
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| D | mediatek,mt8365-clk.h | 80 #define CLK_TOP_SPI_SEL 70 macro
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| D | mt2712-clk.h | 139 #define CLK_TOP_SPI_SEL 108 macro
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| D | mt8192-clk.h | 34 #define CLK_TOP_SPI_SEL 22 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt7986-topckgen.c | 179 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x000,
|
| D | clk-mt7981-topckgen.c | 296 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents,
|
| D | clk-mt7988-topckgen.c | 134 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x030, 0x034, 0x038, 0, 3, 7,
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| D | clk-mt6795-topckgen.c | 467 TOP_MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x60, 16, 3, 23, 0),
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| D | clk-mt8173-topckgen.c | 546 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x0060, 16, 3, 23),
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| D | clk-mt8135.c | 374 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x0150, 16, 3, 23),
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| D | clk-mt8516.c | 423 MUX(CLK_TOP_SPI_SEL, "spi_sel", spi_parents,
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| D | clk-mt8167.c | 612 MUX(CLK_TOP_SPI_SEL, "spi_sel", spi_parents,
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| D | clk-mt8365.c | 431 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x060,
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| D | clk-mt2712.c | 657 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x060, 16, 3, 23),
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| D | clk-mt8192.c | 600 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel",
|