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Searched refs:CLK_TOP_SPI0_SEL (Results 1 – 10 of 10) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7629-clk.h92 #define CLK_TOP_SPI0_SEL 82 macro
Dmt7622-clk.h77 #define CLK_TOP_SPI0_SEL 65 macro
Dmt2701-clk.h97 #define CLK_TOP_SPI0_SEL 86 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7622.c408 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
Dclk-mt7629.c482 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
Dclk-mt2701.c507 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents,
/linux-6.12.1/arch/arm/boot/dts/mediatek/
Dmt7629.dtsi282 <&topckgen CLK_TOP_SPI0_SEL>,
Dmt2701.dtsi343 <&topckgen CLK_TOP_SPI0_SEL>,
Dmt7623.dtsi488 <&topckgen CLK_TOP_SPI0_SEL>,
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi499 <&topckgen CLK_TOP_SPI0_SEL>,