Home
last modified time | relevance | path

Searched refs:CLK_TOP_PEXTP_P0_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt7988-clk.h112 #define CLK_TOP_PEXTP_P0_SEL 84 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7988-topckgen.c228 MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P0_SEL, "pextp_p0_sel", sspxtp_parents, 0x0d0, 0x0d4,