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Searched refs:CLK_TOP_NETSYS_500M_SEL (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7986-clk.h67 #define CLK_TOP_NETSYS_500M_SEL 44 macro
Dmediatek,mt7981-clk.h107 #define CLK_TOP_NETSYS_500M_SEL 94 macro
Dmediatek,mt7988-clk.h59 #define CLK_TOP_NETSYS_500M_SEL 31 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7986-topckgen.c229 MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_500M_SEL, "netsys_500m_sel",
Dclk-mt7981-topckgen.c347 MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_500M_SEL, "netsys_500m_sel",
Dclk-mt7988-topckgen.c109 MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_500M_SEL, "netsys_500m_sel", netsys_500m_parents, 0x000,
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7986a.dtsi545 <&topckgen CLK_TOP_NETSYS_500M_SEL>;