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Searched refs:CLK_TOP_MUX_MFG (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8183.c478 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_MFG, "mfg_sel",
847 if (top_muxes[i].id == CLK_TOP_MUX_MFG) in clk_mt8183_reg_mfg_mux_notifier()
888 .mfg_clk_idx = CLK_TOP_MUX_MFG,
Dclk-mt6797.c336 MUX_GATE(CLK_TOP_MUX_MFG, "mfg_sel", mfg_parents, 0x0050, 24, 2, 31),
/linux-6.12.1/include/dt-bindings/clock/
Dmt6797-clk.h20 #define CLK_TOP_MUX_MFG 10 macro
Dmt8183-clk.h39 #define CLK_TOP_MUX_MFG 3 macro
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt6797.dtsi213 clocks = <&topckgen CLK_TOP_MUX_MFG>,