Searched refs:CLK_TOP_MUX_AUD_INTBUS (Results 1 – 7 of 7) sorted by relevance
30 <&topckgen CLK_TOP_MUX_AUD_INTBUS>,
33 <&topckgen CLK_TOP_MUX_AUD_INTBUS>,
31 #define CLK_TOP_MUX_AUD_INTBUS 21 macro
48 #define CLK_TOP_MUX_AUD_INTBUS 12 macro
354 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
507 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel",
860 clocks = <&topckgen CLK_TOP_MUX_AUD_INTBUS>,1476 <&topckgen CLK_TOP_MUX_AUD_INTBUS>,