Searched refs:CLK_TOP_MUX_AUD_ENG2 (Results 1 – 8 of 8) sorted by relevance
| /linux-6.12.1/sound/soc/mediatek/mt8183/ |
| D | mt8183-afe-clk.c | 36 CLK_TOP_MUX_AUD_ENG2, enumerator
75 [CLK_TOP_MUX_AUD_ENG2] = "top_mux_aud_eng2",
327 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
330 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], ret); in apll2_mux_setting()
333 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
337 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
342 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
346 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
350 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
366 clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
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| /linux-6.12.1/sound/soc/mediatek/mt8192/ |
| D | mt8192-afe-clk.c | 36 [CLK_TOP_MUX_AUD_ENG2] = "top_mux_aud_eng2",
164 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
167 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], ret); in apll2_mux_setting()
170 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
174 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
179 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
183 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
187 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
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| D | mt8192-afe-clk.h | 193 CLK_TOP_MUX_AUD_ENG2, enumerator
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| /linux-6.12.1/sound/soc/mediatek/mt8186/ |
| D | mt8186-afe-clk.c | 57 [CLK_TOP_MUX_AUD_ENG2] = "top_mux_aud_eng2",
174 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
177 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], ret); in apll2_mux_setting()
180 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
184 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
189 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
193 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
197 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
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| D | mt8186-afe-clk.h | 64 CLK_TOP_MUX_AUD_ENG2, enumerator
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt8183-clk.h | 67 #define CLK_TOP_MUX_AUD_ENG2 31 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt8183.c | 545 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_AUD_ENG2, "aud_eng2_sel",
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8183.dtsi | 1484 <&topckgen CLK_TOP_MUX_AUD_ENG2>,
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