Searched refs:CLK_TOP_MUX_AUD_ENG1 (Results 1 – 8 of 8) sorted by relevance
| /linux-6.12.1/sound/soc/mediatek/mt8183/ |
| D | mt8183-afe-clk.c | 34 CLK_TOP_MUX_AUD_ENG1, enumerator
73 [CLK_TOP_MUX_AUD_ENG1] = "top_mux_aud_eng1",
253 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
256 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], ret); in apll1_mux_setting()
259 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
263 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
268 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
272 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
276 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
292 clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
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| /linux-6.12.1/sound/soc/mediatek/mt8192/ |
| D | mt8192-afe-clk.c | 34 [CLK_TOP_MUX_AUD_ENG1] = "top_mux_aud_eng1",
102 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
105 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], ret); in apll1_mux_setting()
108 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
112 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
117 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
121 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
125 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
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| D | mt8192-afe-clk.h | 191 CLK_TOP_MUX_AUD_ENG1, enumerator
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| /linux-6.12.1/sound/soc/mediatek/mt8186/ |
| D | mt8186-afe-clk.c | 55 [CLK_TOP_MUX_AUD_ENG1] = "top_mux_aud_eng1",
113 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
116 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], ret); in apll1_mux_setting()
119 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
123 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
128 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
132 __func__, aud_clks[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
136 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
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| D | mt8186-afe-clk.h | 62 CLK_TOP_MUX_AUD_ENG1, enumerator
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt8183-clk.h | 66 #define CLK_TOP_MUX_AUD_ENG1 30 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt8183.c | 543 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_AUD_ENG1, "aud_eng1_sel",
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8183.dtsi | 1482 <&topckgen CLK_TOP_MUX_AUD_ENG1>,
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