Searched refs:CLK_TOP_ETH_XGMII_SEL (Results 1 – 2 of 2) sorted by relevance
106 #define CLK_TOP_ETH_XGMII_SEL 78 macro
215 MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_XGMII_SEL, "eth_xgmii_sel", eth_xgmii_parents, 0x0c0,