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Searched refs:CLK_TOP_ETH_GMII_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmediatek,mt7988-clk.h62 #define CLK_TOP_ETH_GMII_SEL 34 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7988-topckgen.c116 MUX_GATE_CLR_SET_UPD(CLK_TOP_ETH_GMII_SEL, "eth_gmii_sel", eth_gmii_parents, 0x010, 0x014,