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Searched refs:CLK_TOP_DSP1 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt6779-clk.h47 #define CLK_TOP_DSP1 37 macro
Dmediatek,mt8188-clk.h24 #define CLK_TOP_DSP1 13 macro
Dmt8195-clk.h24 #define CLK_TOP_DSP1 12 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8188-topckgen.c988 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP1, "top_dsp1",
Dclk-mt8195-topckgen.c906 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP1, "top_dsp1",
Dclk-mt6779.c660 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP1, "dsp1_sel", dsp1_parents,