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Searched refs:CLK_TOP_DRAMC_MD32_SEL (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7986-clk.h61 #define CLK_TOP_DRAMC_MD32_SEL 38 macro
Dmediatek,mt7981-clk.h101 #define CLK_TOP_DRAMC_MD32_SEL 88 macro
Dmediatek,mt7988-clk.h110 #define CLK_TOP_DRAMC_MD32_SEL 82 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7986-topckgen.c208 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DRAMC_MD32_SEL, "dramc_md32_sel",
Dclk-mt7981-topckgen.c326 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DRAMC_MD32_SEL, "dramc_md32_sel",
Dclk-mt7988-topckgen.c224 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DRAMC_MD32_SEL, "dramc_md32_sel", dramc_md32_parents,