Searched refs:CLK_TOP_DA_XTP_GLB_P3_SEL (Results 1 – 2 of 2) sorted by relevance
119 #define CLK_TOP_DA_XTP_GLB_P3_SEL 91 macro
244 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P3_SEL, "da_xtp_glb_p3_sel", da_xtp_glb_p0_parents,