Searched refs:CLK_TOP_DA_XTP_GLB_P0_SEL (Results 1 – 2 of 2) sorted by relevance
116 #define CLK_TOP_DA_XTP_GLB_P0_SEL 88 macro
237 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_XTP_GLB_P0_SEL, "da_xtp_glb_p0_sel", da_xtp_glb_p0_parents,