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Searched refs:CLK_TOP_DA_U2_CK_1P_SEL (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7986-clk.h84 #define CLK_TOP_DA_U2_CK_1P_SEL 61 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7986-topckgen.c282 MUX_GATE_CLR_SET_UPD(CLK_TOP_DA_U2_CK_1P_SEL, "da_u2_ck_1p_sel",
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7986a.dtsi469 <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
484 <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;