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Searched refs:CLK_TOP_A_TUNER_SEL (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7986-clk.h79 #define CLK_TOP_A_TUNER_SEL 56 macro
Dmediatek,mt7981-clk.h117 #define CLK_TOP_A_TUNER_SEL 104 macro
Dmediatek,mt7988-clk.h90 #define CLK_TOP_A_TUNER_SEL 62 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7986-topckgen.c267 MUX_GATE_CLR_SET_UPD(CLK_TOP_A_TUNER_SEL, "a_tuner_sel",
Dclk-mt7981-topckgen.c376 MUX_GATE_CLR_SET_UPD(CLK_TOP_A_TUNER_SEL, "a_tuner_sel",
Dclk-mt7988-topckgen.c179 MUX_GATE_CLR_SET_UPD(CLK_TOP_A_TUNER_SEL, "a_tuner_sel", a1sys_parents, 0x080, 0x084, 0x088,