Searched refs:CLK_TOP_AUD_ENGEN1_SEL (Results 1 – 11 of 11) sorted by relevance
/linux-6.12.1/include/dt-bindings/clock/ |
D | mt8516-clk.h | 178 #define CLK_TOP_AUD_ENGEN1_SEL 146 macro
|
D | mt6765-clk.h | 149 #define CLK_TOP_AUD_ENGEN1_SEL 114 macro
|
D | mediatek,mt8365-clk.h | 90 #define CLK_TOP_AUD_ENGEN1_SEL 80 macro
|
D | mt8192-clk.h | 55 #define CLK_TOP_AUD_ENGEN1_SEL 43 macro
|
/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt8516.c | 399 MUX(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel", aud_engen1_parents,
|
D | clk-mt8167.c | 588 MUX(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel", aud_engen1_parents,
|
D | clk-mt8365.c | 461 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel",
|
D | clk-mt8192.c | 649 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel",
|
D | clk-mt6765.c | 428 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel",
|
/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8365.dtsi | 828 <&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
|
D | mt8192.dtsi | 1014 <&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
|