Home
last modified time | relevance | path

Searched refs:CLK_TOP_AUD1_SEL (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt7629-clk.h107 #define CLK_TOP_AUD1_SEL 97 macro
Dmt8516-clk.h176 #define CLK_TOP_AUD1_SEL 144 macro
Dmt7622-clk.h92 #define CLK_TOP_AUD1_SEL 80 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7622.c446 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
Dclk-mt8516.c395 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
Dclk-mt7629.c516 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
Dclk-mt8167.c584 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi622 <&topckgen CLK_TOP_AUD1_SEL>,