Searched refs:CLK_TOP_APLL2_SEL (Results 1 – 4 of 4) sorted by relevance
| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt7622-clk.h | 100 #define CLK_TOP_APLL2_SEL 88 macro
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| D | mt2712-clk.h | 171 #define CLK_TOP_APLL2_SEL 140 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt7622.c | 466 MUX(CLK_TOP_APLL2_SEL, "apll2_ck_sel", apll1_ck_parents,
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| D | clk-mt2712.c | 712 MUX_GATE(CLK_TOP_APLL2_SEL, "apll2_sel", apll_parents, 0x500, 16, 4, 23),
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