| /linux-6.12.1/sound/soc/mediatek/mt8183/ |
| D | mt8183-afe-clk.c | 37 CLK_TOP_APLL2_D8, enumerator
76 [CLK_TOP_APLL2_D8] = "top_apll2_d8",
334 afe_priv->clk[CLK_TOP_APLL2_D8]); in apll2_mux_setting()
338 aud_clks[CLK_TOP_APLL2_D8], ret); in apll2_mux_setting()
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| /linux-6.12.1/sound/soc/mediatek/mt8186/ |
| D | mt8186-afe-clk.h | 65 CLK_TOP_APLL2_D8, enumerator
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| D | mt8186-afe-clk.c | 58 [CLK_TOP_APLL2_D8] = "top_apll2_d8",
181 afe_priv->clk[CLK_TOP_APLL2_D8]); in apll2_mux_setting()
185 aud_clks[CLK_TOP_APLL2_D8], ret); in apll2_mux_setting()
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt8516-clk.h | 72 #define CLK_TOP_APLL2_D8 40 macro
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| D | mediatek,mt8365-clk.h | 61 #define CLK_TOP_APLL2_D8 51 macro
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| D | mt6779-clk.h | 90 #define CLK_TOP_APLL2_D8 80 macro
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| D | mt2712-clk.h | 82 #define CLK_TOP_APLL2_D8 51 macro
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| D | mt8183-clk.h | 115 #define CLK_TOP_APLL2_D8 79 macro
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| D | mt8186-clk.h | 123 #define CLK_TOP_APLL2_D8 104 macro
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| D | mt8192-clk.h | 120 #define CLK_TOP_APLL2_D8 108 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt8186-topckgen.c | 58 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "apll2", 1, 8),
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| D | clk-mt8516.c | 67 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "rg_apll2_d4_en", 1, 2),
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| D | clk-mt8167.c | 74 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "rg_apll2_d4_en", 1, 2),
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| D | clk-mt8183.c | 78 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "apll2", 1, 8),
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| D | clk-mt8365.c | 83 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "apll2_ck", 1, 8),
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| D | clk-mt2712.c | 90 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "apll2_ck", 1, 8),
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| D | clk-mt8192.c | 66 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "apll2", 1, 8),
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| D | clk-mt6779.c | 76 FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", "apll2", 1, 8),
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8183.dtsi | 1485 <&topckgen CLK_TOP_APLL2_D8>,
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| D | mt8186.dtsi | 1510 <&topckgen CLK_TOP_APLL2_D8>,
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