| /linux-6.12.1/sound/soc/mediatek/mt8192/ |
| D | mt8192-afe-clk.c | 35 [CLK_TOP_APLL1_D4] = "top_apll1_d4",
109 afe_priv->clk[CLK_TOP_APLL1_D4]); in apll1_mux_setting()
113 aud_clks[CLK_TOP_APLL1_D4], ret); in apll1_mux_setting()
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| D | mt8192-afe-clk.h | 192 CLK_TOP_APLL1_D4, enumerator
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt8516-clk.h | 67 #define CLK_TOP_APLL1_D4 35 macro
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| D | mt6765-clk.h | 78 #define CLK_TOP_APLL1_D4 43 macro
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| D | mediatek,mt8365-clk.h | 56 #define CLK_TOP_APLL1_D4 46 macro
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| D | mt6779-clk.h | 85 #define CLK_TOP_APLL1_D4 75 macro
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| D | mt2712-clk.h | 76 #define CLK_TOP_APLL1_D4 45 macro
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| D | mt8183-clk.h | 110 #define CLK_TOP_APLL1_D4 74 macro
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| D | mt8186-clk.h | 119 #define CLK_TOP_APLL1_D4 100 macro
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| D | mt8192-clk.h | 115 #define CLK_TOP_APLL1_D4 103 macro
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| D | mediatek,mt8188-clk.h | 143 #define CLK_TOP_APLL1_D4 132 macro
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| D | mt8195-clk.h | 176 #define CLK_TOP_APLL1_D4 164 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt8186-topckgen.c | 54 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
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| D | clk-mt8516.c | 62 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "rg_apll1_d2_en", 1, 2),
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| D | clk-mt8167.c | 69 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "rg_apll1_d2_en", 1, 2),
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| D | clk-mt8183.c | 73 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
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| D | clk-mt8365.c | 78 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1_ck", 1, 4),
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| D | clk-mt2712.c | 84 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1_ck", 1, 4),
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| D | clk-mt8188-topckgen.c | 67 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
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| D | clk-mt8195-topckgen.c | 78 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
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| D | clk-mt8192.c | 61 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
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| D | clk-mt6779.c | 71 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1", 1, 4),
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| D | clk-mt6765.c | 128 FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", "apll1_ck", 1, 4),
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8192.dtsi | 1015 <&topckgen CLK_TOP_APLL1_D4>,
|