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Searched refs:CLK_TOP_APLL12_CK_DIV3 (Results 1 – 7 of 7) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dmt8516-clk.h199 #define CLK_TOP_APLL12_CK_DIV3 167 macro
Dmediatek,mt8365-clk.h125 #define CLK_TOP_APLL12_CK_DIV3 115 macro
Dmediatek,mt8188-clk.h193 #define CLK_TOP_APLL12_CK_DIV3 182 macro
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8516.c485 DIV_ADJ(CLK_TOP_APLL12_CK_DIV3, "apll12_ck_div3", "aud_i2s3_m_sel",
Dclk-mt8167.c674 DIV_ADJ(CLK_TOP_APLL12_CK_DIV3, "apll12_ck_div3", "aud_i2s3_m_sel",
Dclk-mt8365.c559 DIV_ADJ_F(CLK_TOP_APLL12_CK_DIV3, "apll12_ck_div3", "apll_i2s3_sel",
Dclk-mt8188-topckgen.c1185 DIV_GATE(CLK_TOP_APLL12_CK_DIV3, "apll12_div3", "top_i2so2", 0x0320, 3, 0x0328, 8, 24),