Searched refs:CLK_TOP_APLL12_CK_DIV1 (Results 1 – 10 of 10) sorted by relevance
/linux-6.12.1/include/dt-bindings/clock/ |
D | mt8516-clk.h | 197 #define CLK_TOP_APLL12_CK_DIV1 165 macro
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D | mediatek,mt8365-clk.h | 123 #define CLK_TOP_APLL12_CK_DIV1 113 macro
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D | mt8186-clk.h | 151 #define CLK_TOP_APLL12_CK_DIV1 132 macro
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D | mediatek,mt8188-clk.h | 191 #define CLK_TOP_APLL12_CK_DIV1 180 macro
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/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt8186-topckgen.c | 674 DIV_GATE(CLK_TOP_APLL12_CK_DIV1, "apll12_div1", "apll_i2s1_mck_sel",
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D | clk-mt8516.c | 481 DIV_ADJ(CLK_TOP_APLL12_CK_DIV1, "apll12_ck_div1", "aud_i2s1_m_sel",
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D | clk-mt8167.c | 670 DIV_ADJ(CLK_TOP_APLL12_CK_DIV1, "apll12_ck_div1", "aud_i2s1_m_sel",
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D | clk-mt8365.c | 555 DIV_ADJ_F(CLK_TOP_APLL12_CK_DIV1, "apll12_ck_div1", "apll_i2s1_sel",
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D | clk-mt8188-topckgen.c | 1183 DIV_GATE(CLK_TOP_APLL12_CK_DIV1, "apll12_div1", "top_i2si2", 0x0320, 1, 0x0328, 8, 8),
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8186.dtsi | 1517 <&topckgen CLK_TOP_APLL12_CK_DIV1>,
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